Teaching @UR

My teaching at University of Rochester (UR) between 2008 and 2016 centered around VLSI ASIC Design, FPGA Design/Programming, GPU architecture and programming, general introductory-level programming, and Data analytics using machine learning methods. All of the courses I offered were very hands-on and designed to equip my students with the skills that are directly applicable to an industrial setting.


My senior- and graduate-level courses did not have exams or finals. However, the lab workload was quite heavy. I believe that a student will not acquire the necessary skills unless (s)he is exposed to fairly sophisticated projects during the class. I encourage my graduate students to work on projects that are also applicable to their research. This is why the last project of each class was open-ended which allows students from different disciplines to work on projects that are very diverse and exciting !


The structure of each class was a 1.5 hours of lecturing and 1.5 hours of lab work every week. Each class had individual and group projects. Each project increased in complexity throughout the semester. Individual projects taught the basics, while group project(s) promoted team work. A typical example is the real-time edge detection FPGA project or the real-time face recognition GPU project, which students might not have a background in. However, by providing the theoretical background and the basic hardware/software building blocks within a few lectures, my students were able to apply these concepts to build these systems within the three week time frame.



2008-2016  MOSIS Educational Program (MEP); Educational VLSI/IC fabrication; UR ECE Dept.

2009-2016  Xilinx University Program (XUP); Educational FPGA development; UR ECE Dept.

2011-2016  GPU Teaching Center award. Nvidia Corp; PI for University of Rochester.

2012-2016  GPU Research Center award, Nvidia Corp; PI for University of Rochester.